Is Texas Instruments Quietly Winning the AI Power Race?

Srikanth
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Srikanth
Srikanth is the founder and editor-in-chief of TechStoriess.com — India's emerging platform for verified AI implementation intelligence from practitioners who are actually building at the frontier....
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TL;DR

  • On December 17, 2025, Texas Instruments started production at SM1, the first of four planned fabs at its Sherman, Texas site — part of a $60 billion, seven-fab commitment across Texas and Utah.
  • The fab manufactures power management chips and voltage regulators — not GPUs — addressing a crucial supply constraint that’s far less discussed than chip or grid shortages, but sits directly upstream of AI rack deployment.
  • Sherman is one fab that addresses one layer of a five- or six-layer bottleneck stack — grid transformers, advanced packaging, and memory shortages remain unresolved.
  • Rather than focusing solely on GPU allocation, enterprises negotiating data-center or hardware timelines should be asking vendors about power-delivery component sourcing, which can stall deployment even when compute supply and grid power are secured.

Texas Instruments’ new Sherman fab doesn’t make GPUs. It makes the chips that keep GPUs from starving for power – and in 2026, that’s turned into one of -several- binding constraints on how fast AI infrastructure can actually get built.

Every AI infrastructure headline in 2026 has pointed to some combination of the same three culprits: not enough electricity, not enough transformers, not enough advanced chips. Few have pointed sixty miles north of Dallas, to a semiconductor plant that produces none of the above – and yet sits directly upstream of the problem.

On December 17, 2025, Texas Instruments began production at just one fab, SM1, the first of four planned at its Sherman, Texas mega-site. It is part of a commitment exceeding $60 billion across seven fabs in Texas and Utah – the largest single investment in foundational semiconductor manufacturing in U.S. history, according to the company’s own announcement. That $60 billion is spread across a decade-long build-out, not a single completed plant. The facility does not chase the sub-5-nanometer nodes that dominate AI chip coverage. It makes something far less photogenic: power management chips, voltage regulators, and multiphase controllers – the components that regulate how electricity actually reaches an AI GPU once it arrives at a rack.

That distinction is the story – not because Sherman single-handedly fixes the bottleneck, but because it’s the clearest evidence yet of where an overlooked piece of it sits.

The Bottleneck Has Moved Twice in Two Years

Through 2024 and 2025, the dominant AI infrastructure narrative was electricity: not enough grid capacity to energize the data centers hyperscalers were racing to build. By early 2026, reporting from Data Center Knowledge and other trade outlets pointed to a second, more granular constraint sitting inside that same problem – the physical hardware needed to deliver power once it reaches a site. Large power transformers, once ordered two to three years ahead of need, were quoted at lead times stretching toward five years, according to multiple 2026 industry trackers, including analysis published by Tech Fund and Data Center Knowledge.

Supply-chain analytics firm Accuris flagged a related, quieter shortage: power integrated circuits – the chips that manage voltage and current inside every server rack – built almost entirely on mature manufacturing nodes between 90 and 350 nanometers. Their finding was blunt. Chipmakers spent the past several years pouring capital into leading-edge nodes for AI accelerators while under-investing in the mature-node capacity that produces power ICs, automotive electronics, and industrial components. Demand for AI server racks has now outpaced that undersized base.

This is the gap Sherman was built to close – even if it began construction years before “power IC shortage” entered the industry vocabulary.

What’s Actually Coming Off the Line

SM1 fabricates 300-millimeter wafers, a jump from the 200-millimeter standard TI has historically relied on. According to TI’s own technical briefings, the larger wafer surface delivers roughly 2.3 times more usable area per run, translating to an estimated 40 percent reduction in per-chip fabrication cost. The fab operates in the 28-to-130-nanometer range – deliberately distant from the cutting-edge nodes TSMC and Samsung compete over for Nvidia and AMD accelerators.

That’s not a limitation; it’s the point. The chips Sherman produces – including TI’s CSD965203B smart power stage and related multiphase controllers – are engineered for high-voltage precision and thermal durability rather than raw transistor density. Modern AI GPUs now draw 700 to 1,000-plus watts each, and every one of those watts has to pass through exactly this category of component before it reaches the silicon actually doing the computation. A shortage anywhere in that delivery chain stalls deployment just as effectively as a shortage of the GPU itself.

That 100-million-a-day figure is a target for the full four-fab site, not a description of what SM1 alone produces today – TI has stated it expects the Sherman site to -eventually- reach that volume, with SM2’s shell already complete and tooling scheduled to begin later in 2026, and SM3/SM4 still to follow. Right now, one fab is running. The company has named Apple, Ford, Medtronic, Nvidia, and SpaceX among customers strengthening supply relationships tied to the buildout.

Why This Matters More Than Another GPU Headline

For enterprise technology buyers, the Sherman story is a useful corrective to a compute conversation that has mostly fixated on GPU allocation – not proof that the power-component shortage is now solved. A May 2026 report from the Center for a New American Security found that chip supply – spanning advanced logic, high-bandwidth memory, and packaging – has become a binding constraint on AI compute buildout timelines, alongside the persistent power-infrastructure bottleneck. Multiple 2026 industry analyses now describe AI infrastructure as gated by five or six scarce layers simultaneously, rather than any single chokepoint: power generation, grid transformers, advanced packaging, memory, and – increasingly visible – the mature-node components that manage power once it’s inside the building. Sherman addresses exactly one of those layers.

Sherman doesn’t resolve the grid-transformer backlog or the multiyear interconnection queues data-center developers are still fighting through in Texas, Virginia, and elsewhere. But it addresses a layer of the stack that had received comparatively little public attention: domestic capacity for the unglamorous chips every rack needs regardless of which GPU vendor wins the broader race. TI has framed its ambition explicitly around this gap, stating a goal of reaching 95 percent in-house manufacturing by 2030 – a direct hedge against the packaging and foundry bottlenecks that have repeatedly disrupted leading-edge chip supply over the past three years.

The Real Read for CTOs and CFOs

One fab, however large, doesn’t rebalance a global mature-node capacity gap years in the making – and nothing here should be read as the power-IC shortage being solved. What Sherman does confirm is that the AI supply chain now needs to be planned as a stack of five or six distinct scarce layers, not one. Enterprises negotiating data-center capacity or custom hardware timelines should be asking vendors specifically about power-delivery component sourcing, not just GPU allocation – since a fully permitted, fully powered facility can still sit idle waiting on a multiphase controller.

Sherman is also a data point in a broader reshoring story tied to the CHIPS Act: whether domestic mature-node capacity, long overshadowed by the race for leading-edge fabrication, ends up mattering as much to AI deployment timelines as the next GPU generation announcement. For now, that remains an open question – one fab does not answer it. What it does is put the question on the table for the first time with real capital behind it.

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Srikanth is the founder and editor-in-chief of TechStoriess.com — India's emerging platform for verified AI implementation intelligence from practitioners who are actually building at the frontier. Based in Bengaluru, he has spent 5 years at the intersection of enterprise technology, emerging markets, and the human stories behind AI adoption across India and beyond.
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